材料科学
小型化
光电子学
散热片
硅
微型多孔材料
薄脆饼
反应离子刻蚀
蚀刻(微加工)
热阻
纳米技术
传热
复合材料
电气工程
物理
图层(电子)
热力学
工程类
作者
Sujan Dewanjee,Gaurav Singhal,Jiaqi Li,Danny J. Lohan,Saurabh Joshi,Paul V. Braun,Nenad Miljkovic
标识
DOI:10.1109/itherm55368.2023.10177496
摘要
Efficient thermal management of semiconductor devices is critical to enable the growth of computational power. Over the past few decades, transistor volumetric packing densities (number of transistors per unit volume) have been increasing, enabling further miniaturization of electronic chips. To address thermal constraints, the development of scalable and robust manufacturing techniques for chip-scale integrated two-phase cooling has been a topic of interest over the past decade. Copper and silicon microchannels have been studied to enable near-junction phase change heat transfer, which show a substantial increase in allowable heat flux due to enhanced evaporation, increased three phase contact line length, and more efficient pool and flow boiling. Electrodeposited metal layers as well as sintering have been used to incorporate roughness on these microchannels. Previous studies have used standard photolithography, laser etching, and deep reactive ion etching for fabricating microchannels. Due to fabrication limitations, these studies have been able to achieve channel and fin widths on the order of 5 µm to 300 µm and fin heights ranging from 10 µm to 350 µm, Here, we investigate the pool boiling performance of micro channel microporous copper structures grown scalably on silicon wafers. Unlike previous approaches, we fabricate the structure using mask-less photoresist pattern writing and electrodeposition of porous copper. Optimized design guidelines are predicted by exploring the micro channel width and microporous copper structure thickness ranging from 10 µm to 400 µm, while structure heights are kept in the range of 25 µm to 50 µm, We demonstrate an optimized pore size can be predicted in terms of durability and improved heat transfer coefficient by varying current density from 20 mA/cm 2 to 1 A/cm 2 during fabrication. We analyze bubble dynamics during water pool boiling on the fabricated structures to find out the reason behind the results found. The results show prominent increases in critical heat flux and heat transfer coefficient due to escalated capillary activation stemming from the porous interconnected structures. Our work not only explores a distinctive, durable and scalable fabrication method for cooling devices on semiconductors, but also develops guidelines for the scalable and facile development of high-capillarity conductive porous structures.
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