Stress-strain analysis and optimization of TSV interconnect structure parameters under thermal cyclic load loading based on bp neural network

In this paper, Firstly, a three-dimensional TSV chip vertical stacking package structure finite element analysis model was established based on ANSYS software, and the model was subjected to finite element analysis under thermal cyclic loading conditions to obtain the stress-strain distribution of TSV interconnect structure; and orthogonal test design and ANOVA were performed on the TSV interconnect structure parameters and material parameters under thermal cyclic loading. The results show that the copper column diameter, copper column height and SiO 2 layer thickness have significant effects on the stress of the TSV interconnect structure at the confidence level of 95%. Then the BP neural network prediction software was established to realize the stress prediction of TSV interconnect structure under thermal cyclic loading, and the neural network was tested by five different sets of TSV interconnect structure morphological parameters combinations, and the predicted and simulated values were evaluated with an error of x%, indicating that it can better realize the stress prediction of TSV interconnect structure under thermal cyclic loading.