微处理器
CMOS芯片
关键路径法
电子工程
炸薯条
路径(计算)
电压
计算机科学
功率(物理)
测距
绝缘体上的硅
拓扑(电路)
嵌入式系统
工程类
电气工程
材料科学
电信
物理
计算机网络
硅
光电子学
量子力学
系统工程
作者
Bruce Fleischer,Christos Vezyrtzis,Karthik Balakrishnan,K.A. Jenkins
标识
DOI:10.1109/iccd.2016.7753334
摘要
Local variation of delay paths has a significant impact on modern microprocessor performance and yield. A critical path monitor is reported which extracts timing variability information on various critical paths, including sample processor paths. The very compact circuit contains 256 copies of 15 different delay paths, enabling measurement of the statistics of delay variation, as a function of threshold voltage, supply voltage, fanout, temperature, and circuit topology. Measurements of 14nm SOI finFET [1] circuit path delays are presented. The reported sensor can offer a variety of advantages on a processor chip, ranging from testing time improvement to power savings.
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