Charge transfer mechanism for realization of double negative differential transconductance

Abstract With development of information age, multi-valued logic (MVL) technology utilizing negative differential transconductance (NDT) phenomenon has drawn attention as next-generation computing technology that can replace binary logic. However, because conventional NDT devices primarily use ternary logic, multiple-peak NDT device is required for higher-radix MVL that can process more datasets. Here, van der Waals double-peak anti-ambipolar transistor (AAT) as NDT device was developed by utilizing peak voltage (V peak ) modulation of NDT peak. For realization of quaternary logic, V peak modulation technology was developed through charge transfer mechanism from channel, thereby shifting NDT peak and increasing peak-to-valley current ratio (PVCR). Furthermore, Double-peak AAT was implemented through parallel configuration of two AATs with different V peak values. Finally, quaternary inverter with four widely stable logic states was implemented by utilizing the developed double-peak AAT with two distinct NDT peaks and high PVCR. This double-peak AAT is expected to contribute to the development of next-generation MVL technology capable of processing datasets.