宽带
电感器
电气工程
电子工程
CMOS芯片
电力传输
插入损耗
工程类
带宽(计算)
回波损耗
输电线路
拓扑(电路)
放大器
散射参数
炸薯条
计算机科学
静脉曲张
网络拓扑
电子元件
电磁屏蔽
分离(微生物学)
感应耦合
功率(物理)
威尔金森功分器
渡线
足迹
分布式放大器
集成电路设计
电感
设计流量
联轴节(管道)
作者
Jiazhi Ying,Zhijuan Zhao,Yikun Wang,Zhiwei Zhou,Zunxiang Wang,Qianteng Wu,Yu Xiao,Kaiqiang Zhu,Houjun Sun
标识
DOI:10.1109/tmtt.2025.3639999
摘要
This article presents an ultra-compact and broadband Wilkinson power divider/combiner (WPDC) designed for large-scale phased arrays. To minimize the chip area, a shortened transmission line (T-line) topology using a metal-stacked inductor is introduced into the two stages. Furthermore, to address the isolation bandwidth (BW) limitations, two sections of shortened T-lines are adopted and innovatively implemented within a single inductor footprint by utilizing a magnetic coupling self-canceling technique. Detailed analysis and design flow of the proposed network synthesis are provided, demonstrating a 67% area reduction. Moreover, a novel shielding topology is employed to simultaneously enhance isolation between combiners and ensure amplitude/phase uniformity across distribution branches. To verify the proposed technique, a C–X-band WPDC, consisting of two 1:4 power combining units dedicated to intermediate frequency (IF) and local oscillator (LO) bands, respectively, is fabricated in a 65-nm bulk CMOS process. The prototype exhibits a measured insertion loss (IL) of within 3.2/3.4 dB and isolation exceeding 24.9/26.0 dB across the IF (6–10 GHz)/LO (8–12GHz) band. Notably, isolation greater than 60 dB is attained between IF and LO crossover networks, which is validated in antenna-in-package (AiP) measurements. This design features an ultra-compact core area, a highly competitive fractional isolation BW, and an outstanding branch isolation among state-of-the-art reported works, rendering it well-suited for area-constrained large-scale and multibeam phased-array systems.
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