Enhancing FeFET Structures for Non‐Volatile On‐Chip Memories: Design and Comparative Analysis

ABSTRACT FeFET architectures for non‐volatile on‐chip memory are designed and compared in this investigation study. Because of its inherent non‐volatile properties and low power requirements, FeFETs are attracting a lot of interest as prospective candidates for future memory technology. The aim of this paper is to investigate several FeFET designs and assess how well they function in terms of important factors including durability, retention, speed, and endurance. Using device simulations and experimental data, a number of FeFET architectures, such as MFS, MFIS, MFMIS, and MF‐ABO 3 , are analyzed and contrasted. Comparative study gives light on the advantages and disadvantages of various FeFET architectures; improving our comprehension of how well‐suited they are for non‐volatile on‐chip memory. This work will contribute to the improvement of FeFET devices for upcoming integrated circuits and progress the development of sophisticated FeFET‐based memory techniques.