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50 积分 2024-08-31 加入
A 0.5-V 125-MHz 256-Kb 22-nm SRAM With 10-aJ/bit Active Energy and 10-pW/bit Shutdown Power
14天前
已完结
3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications
19天前
已完结
CMOS Directly Bonded to Array (CBA) Technology for Future 3D Flash Memory
1个月前
已完结
29.5 A 3nm 3.6GHz Dual-Port SRAM with Backend-RC Optimization and a Far-End Write-Assist Scheme
1个月前
已完结
A 38Mb/mm2 380/540mV Dual-Rail SRAM in 3nm-FinFET Technology
1个月前
已完结
0.021-μm 2 High-Density SRAM in Intel 18A RibbonFET Technology With PowerVia Backside Power Delivery
1个月前
已完结
A 38.1Mb/mm2 SRAM in a 2nm-CMOS-Nanosheet Technology for High-Density and Energy-Efficient Compute
1个月前
已完结
15.4 Self-Enabled Write-Assist Cells for High-Density SRAM in a Resistance-Dominated Technology Node
1个月前
已完结
15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture
1个月前
已完结
15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia
1个月前
已完结
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