| 标题 |
Continuous-Time $\Delta \Sigma $ Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC |
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| DOI | |
| 其它 |
期刊:IEEE Journal of Solid-State Circuits 作者:Timir Nandi; Karthikeya Boominathan; Shanthi Pavan 出版日期:2013-07-20 |
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(2025-6-4)