硅
材料科学
激光器
生产线后端
光电子学
直线(几何图形)
电气工程
工程类
光学
物理
几何学
数学
电介质
作者
Jonas D. Huyeng,Alexander Göbel,Sabrina Lohmüller,Daniel von Kutzleben,Julian Weber,R. Preu
标识
DOI:10.1109/pvsc57443.2024.10748863
摘要
Cutting full silicon wafer cells into smaller sub cells offers advantages in terms of module output power and has therefore become state of the art. Besides half-cut cells, multi-cut solar cells offer attractive advantages when interconnected by the “shingling” approach, maximizing the photoactive area. However, post-metallization cutting of solar cells also introduces unpassivated edges, which leads to further power losses. Therefore, optimization of the back-end of line processes is important, namely optimization of the electrode layout (considering the limitations of the interconnection process), cutting host cells into smaller sub cells (by low-damage cutting) and post-cutting treatment to maximize the output power (by passivated edge technology PET), as described in this work. Notably, the described processes can be implemented with passivated emitter and rear cell (PERC) technology, as well as tunnel-oxide passivating contacts (TOPCon) and silicon heterojunction (SHJ) technology. We show partial recovery of FF (up to 65%) and VOC losses (up to 100%) due to PET, reduction of cutting induced ΔpFF = +1.1 %abs by low-damage cutting and improvement of host cell current densities of ΔjSC = +0.5 mA/cm² by adjusted electrode design.
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