Co-field-reconciled direct growth of 6-inch monolayer graphene

Abstract The transfer-free synthesis of inch-scale high-quality graphene on insulators is of paramount importance for emerging electronic and optoelectronic applications. Nevertheless, recent efforts on direct growth by chemical vapor deposition route failed to produce monolayer graphene in large wafer size (i.e. 6 inch) affording scalable uniformity and batch repeatability. Here we report a co-field-reconciled synthetic strategy in which the synergistic optimization of thermal and gas flow fields readily allows the uniform growth of 6-inch monolayer graphene over sapphire wafer with batch production capability. The temperature and flow fields are dictated via the concurrent deployment of a graphite gasket and gas distributor plate, with the effectiveness evidenced by simulation and wafer-level characterization results. Theoretical calculations reveal that our route lowers the methane decomposition barrier and restrains multilayer nucleation. The thus-prepared graphene exhibits impressive crystal quality, spatial uniformity, and electrical performance. 6-inch wafer-scale top-gated graphene field-effect transistor arrays showcase consistent device characteristics, with a room-temperature mobility average rivaling the state-of-the-arts. The generality of such a route could be extended to other insulating substrates including SiC, WC, Si3N4 and SiO2. This work achieves the co-field optimization during wafer-level graphene growth over insulators and lays the foundation for advancing large-scale integration of graphene.