德拉姆
可靠性(半导体)
极紫外光刻
材料科学
动态随机存取存储器
晶体管
表征(材料科学)
电容器
计算机科学
电子工程
嵌入式系统
光电子学
可靠性工程
电气工程
计算机硬件
工程类
半导体存储器
纳米技术
功率(物理)
物理
电压
量子力学
作者
Seoul Lee,G.-J. Kim,N-H. Lee,KW. Lee,BW. Woo,Jahoon Jin,JG. Kim,YS. Lee,Kim Hs,Sangwoo Pae
标识
DOI:10.1109/iedm19574.2021.9720613
摘要
Extensive reliability characterization of advanced DRAM (with and without HK/MG) with EUV process technology is presented. The technology features buried-channel array transistor(BCAT), dual-poly gate core/periphery transistors, 4-metal layers with Cu/Al interconnects, embedded DRAM capacitor, and with 8, 12, 16Gb chips, enabling mobile LPDDRs, Graphic-DDR, HBM, and making up to 128-256GB DIMMs for server applications. FEOL and BEOL WLR reliability demonstrated showed well above 10 yrs, 125°C intrinsic performance and were also validated with long term months of stresses including 1000 hrs ofHTOL and> 6 months package level stresses. DIMMs were also tested with various workloads using server systems, for more than 1 yr, accurately validating the excellent reliability results that showed only few hundred ppms on 32-64GB DIMMs. Early fails can be further optimized by process defect control and test screens, such as burn-in. The DRAM memories are well in volume production.
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