A Thermal-Aware Device Design Considerations for Nanoscale SOI and Bulk FinFETs

Thermal performance characteristics of fin-shaped FETs (FinFETs) are studied and analyzed in this paper for sub-22-nm technologies using the well-calibrated TCAD simulations. In this paper, we show that bulk FinFETs have a relatively better thermal performance as compared with SOI FinFETs. In order to understand the isothermal characteristics of these devices because of thermal effects, we use pulse rise-time as well as ac conductance methods. We demonstrate that the ac conductance method fails to accurately capture thermal time constants for FinFETs, as self-heating and gate resistance regions are indistinguishable from each other. A pulse rise-time method gives isothermal characteristics of these devices. As verified from both these independent techniques, only at high frequencies (>1 GHz), FinFETs show a suppression of thermally induced degradation, which can be attributed to their higher surface-to-volume ratio. It is observed that bulk FinFETs will perform better than SOI FinFETs for small effective fin heights. However, as we show in this paper, increased body doping in bulk FinFETs will increase the self-heating effects. Channel length scaling in FinFETs, which shows a decrease in drain current degradation with heating, will be an important design parameter for sub-22-nm devices.