Digital excess loop delay compensation technique with embedded truncator for continuous‐time delta–sigma modulators
作者
Tao He,Yi Zhang,Gábor C. Temes
出处
期刊:Electronics Letters [Institution of Engineering and Technology] 日期:2015-11-18卷期号:52 (1): 20-21被引量:4
标识
DOI:10.1049/el.2015.1595
摘要
A novel implementation is proposed to relax the specifications of the internal feedback path for a continuous‐time delta–sigma modulator. A truncator is embedded into the digital excess loop delay (ELD) compensation path. Thermometer‐coded truncation is achieved by re‐ordering the reference voltages of the internal quantiser. This requires only a small amount of extra digital circuitry compared to the conventional digital ELD compensation. The digital encoder controlling the digital‐to‐analogue converter is simple, and it only introduces a small ELD.