A Relative-Prime Rotation Based Fully On-Chip Background Skew Calibration for Time-Interleaved ADCs

An on-chip background skew calibration technique for time-interleaved (TI) ADCs with relative-prime rotation (RPR) based autocorrelation computation is presented, with which more flexible choice of number of channels and no residual skew accumulation are realized. An 8 × TI 10b 1.4GS/s prototype ADC with fully on-chip calibration achieves an SNDR of 48.2dB at over Nyquist input and a FoM of 33 fJ/c-s in 28-nm FDSOI. The on-chip calibration circuitry takes only 24% of the ADC-core power consumption.