钝化
原子层沉积
材料科学
退火(玻璃)
电介质
分析化学(期刊)
形成气体
载流子寿命
光电子学
薄膜
硅
图层(电子)
纳米技术
化学
色谱法
复合材料
作者
Honggyun Kim,Vijay D. Chavan,Jamal Aziz,Byoungsu Ko,Jae-Sung Lee,Junsuk Rho,Tukaram D. Dongale,Kyeong-Keun Choi,Deok‐kee Kim
出处
期刊:IEEE Access
[Institute of Electrical and Electronics Engineers]
日期:2022-01-01
卷期号:10: 68724-68730
被引量:17
标识
DOI:10.1109/access.2022.3183593
摘要
The surface passivation of a CMOS image sensor (CIS) is highly beneficial for the overall improvement of a device performance. We employed the thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques for the deposition of 20 nm HfO2 as well as stacked with 3 and 5 nm Al2O3 thin films. The HfO2/Si and Al2O3/HfO2/Si metal-oxide-semiconductor structures were used to analyze the fixed charge density (Q(f)) and interface trap density (D-it). The as-synthesized samples show high D-it and Q(f) values (10(12) cm(-2)eV(-1)) and a minority carrier lifetime of 15-300 mu s. The finite-difference time-domain simulation of high-k dielectrics confirmed that the Al2O3 (top)/HfO2 stacked structures expected higher quantum efficiency for CIS application. The effect of vacuum annealing (VA) and forming gas annealing (FGA) treatments succeeded with the decomposition of the Dit and increase in carrier lifetime. The H-2 ambient FGA samples showed a remarkable decrease in the D-it values. To improve the overall performance of the device after passivation, we employed an Al2O3/HfO2 bilayer structure, which showed a low D-it of 10(11) cm(-2)eV(-1) and a minority carrier lifetime of similar to 3,700 mu s after 400 degrees C and 30 min FGA. We believe that this surface passivation strategy will pave way for future CIS technology regarding the development of lower defective surface and superior performance.
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