薄膜晶体管
有源矩阵
材料科学
氧化物薄膜晶体管
光电子学
无定形固体
蚀刻(微加工)
晶体管
X射线光电子能谱
硅
图层(电子)
纳米技术
化学
电气工程
化学工程
结晶学
电压
工程类
作者
Ming‐Chin Hung,Hsia‐Tsai Hsiao,Wei‐Ting Lin,Chun‐Hao Tu,Jiun‐Jye Chang,Po-Lun Chen
标识
DOI:10.1143/jjap.50.03cb07
摘要
The present five masks bottom gate and staggered amorphous silicon (a-Si) thin-film transistor (TFT) process flow is not suitable for indium–gallium–zinc-oxide (IGZO) TFT because of its vulnerability to post etching process during the source/drain pattern. Bottom gate and coplanar IGZO TFTs were made feasible through the reverse of second (channel layer) and third (source/drain electrodes) masks process flow to avoid etching damage problem. Besides, the post IGZO nitrous oxygen (N 2 O) plasma treatment was employed to improve the stress instability. On the basis of secondary ion mass spectrometry (SIMS) and X-ray spectroscopy (XPS) results, it is believed that the post N 2 O plasma treatment passivates the interface states and converts the inhomogeneous and low quality IGZO to the homogeneous and high quality IGZO. In the end, a 5-in. IGZO active-matrix liquid crystal display was demonstrated via five masks bottom gate and coplanar TFT configuration.
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