退火(玻璃)
材料科学
电容器
电介质
光电子学
与非门
介电强度
原子层沉积
量子隧道
电阻率和电导率
电子工程
锡
可靠性(半导体)
等离子体增强化学气相沉积
电气工程
随时间变化的栅氧化层击穿
缩放比例
生产线后端
形成气体
平面的
静电放电
高-κ电介质
逻辑门
阴极
偶极子
作者
Davide Tierno,H. Bana,M. H. Van Der Veen,Yongbin Jeong,Stefan Decoster,G. Van Den Bosch,J. W. Maes,M. Rosmeulen
标识
DOI:10.1109/tdmr.2026.3673011
摘要
Post-metallization annealing (PMA) offers significant resistivity improvements for molybdenum word lines (WLs) in 3D NAND Flash, but its impact on device reliability remains unclear. This work systematically evaluates PMA effects using planar capacitors designed for high-temperature processing, comparing Mo deposited by PVD and ALD on PECVD and PEALD SiO2 under H2 (650 °C) and N2 (750 °C) annealing. Our electrical characterization reveals trap-assisted Fowler-Nordheim tunneling as the dominant conduction mechanism, with barrier heights significantly influenced by annealing conditions in PEALD SiO2. Time-dependent dielectric breakdown (TDDB) measurements at elevated temperatures confirm that no metal drift occurs even after high-temperature annealing. Failure is caused by a field-driven intrinsic dielectric breakdown, with no evidence of Mo-induced degradation. H2 annealing provides an optimal balance between resistivity improvement and interface quality. These findings establish a pathway for implementing barrierless Mo metallization in sub-30nm z-pitch 3D NAND devices, enabling further vertical scaling while maintaining reliability requirements for both programming and reading operations.
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