物理
CMOS芯片
调制(音乐)
计算机科学
路径(计算)
光电子学
声学
程序设计语言
作者
Xiaoteng Zhao,Yong Chen,Lin Wang,Pui-In Mak,Franco Maloberti,Rui P. Martins
标识
DOI:10.1109/rfic51843.2021.9490486
摘要
This paper reports a reference-less single-loop bang-bang clock and data recovery (BBCDR) circuit featuring fast and robust frequency acquisition without identifying the frequency error polarity. The key idea is a deliberately-current-mismatch charge-pump pair, which avoids the need of a complex high-speed data path or clock path during frequency acquisition. Prototyped in 28nm CMOS, our BBCDR covers a 47.6-to-58.8Gb/s PAM-4 input automatically. The achieved energy efficiency (≤0.25pJ/bit) and acquisition speed $[9.8(\text{Gb}/\mathrm{s})/\mu\mathrm{s}]$ compare favorably with the prior art. Keywords—CMOS, reference less, single loop, half-rate, bang-bang clock and data recovery (BBCDR), frequency detector (FD), charge pump (CP), 4-level pulse amplitude modulation (PAM-4), zero (ZNC), positive (PNC), and negative (NNC) net current.
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