Machine Learning-Assisted Multiobjective Optimization of Advanced Node Gate-All-Around Transistor for Logic and RF Applications

In this work, using multiobjective optimization (MOO) technique, design optimization of a gate-all-around field-effect transistor (GAAFET) has been performed for improved device logic and RF parameters. By using fast and accurate machine learning (ML) surrogate model, we have emulated the logic and RF performance figures of merit as analytic functions of the design objectives. Datasets required to train and test the ML model are generated using the well-calibrated TCAD setup. The multiobjective optimizers automate and perform extremely fast multispace design optimization. Contrary to MOO, TCAD optimization is tedious and time-intensive. Keeping in view of the International Roadmap of Devices and Systems (IRDS) target, optimal design trade-offs between ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio and speed for logic; gain and cut-off frequency ( ${f}_{T}$ ) for RF operation are obtained for a sub-2 nm node GAAFET. Circuit simulation is performed to further validate the design optimization methodology. Moreover, it has been demonstrated that an efficient and faster trade-off between complex nonlinear design parameters can be automated by leveraging the ML-coupled MOO framework for any advanced-node FET.