Defect Reduction in Epilayers for SiC Trench MOSFETs by Enhanced Epitaxial Growth

The yield of high power 4H-SiC Trench-MOSFET devices, especially for those with large chip area, is largely dependent on the quality of the underlying epitaxial layers and therefore low densities of critical defects are of utmost importance. Different growth conditions for the deposition of epitaxial layers were investigated to reduce the impact of defects on electrical device performance. For this investigation, 12 μm thick n-type epitaxial layers were grown varying growth rates for the buffer and the drift layer in a warm-wall chemical vapor deposition reactor. The defects in the epitaxial layers were characterized utilizing surface microscopy as well as ultraviolet photoluminescence techniques. A quantitative comparison of surface defects and crystallographic defects between the different growth conditions was conducted with these methods. The impact of the growth conditions on the formation of critical defects is discussed in detail. The reduction of critical defects, which resulted in an increase of the predicted die yield, as well as an outlook on future investigations, is discussed.