A Reusable Convolutional Accelerator for CNN on Resource-limited FPGA

A Convolutional Neural Network (CNN) is a class of artificial neural networks that have shown advantages in visual imagery analysis. Implementing a high-performance CNN with limited computation and memory resources is desirable for commercial use and green computation purpose. Tremendous FPGA-based accelerators are designed to achieve this goal. However, existing accelerators are mostly designed for high-performance FPGAs and it is difficult to achieve the desired performance when deploying them to resource-limited ones. Furthermore, in different application scenarios, different CNN and FPGA boards are usually adopted. Existing accelerators require complex configurations to adapt to a different scenario where the CNN input size or FPGA resources are changed. To deal with these problems, we propose a reusable convolutional accelerator for CNN. We utilize the particle swarm optimization (PSO) method to mathematically model the FPGA resources and find the optimal parameters to realize reusability. In the experiment, we implemented four CNN networks on two FPGA boards. The experiment result shows that the proposed accelerator can achieve 30$\sim$40 GOP/s even with resourcelimited FPGA.