非易失性存储器
铁电性
开发(拓扑)
计算机科学
材料科学
工程类
计算机硬件
电气工程
数学
电介质
数学分析
作者
T. S. Moise,Scott R. Summerfelt,J. Rodriguez
出处
期刊:Electronics
[Multidisciplinary Digital Publishing Institute]
日期:2025-02-19
卷期号:14 (4): 818-818
被引量:1
标识
DOI:10.3390/electronics14040818
摘要
An overview of the steps employed to advance non-volatile Pb(ZrxTi1−x)O3-based materials from parallel capacitor array test structures to embedded 130 nm (1.5 V operation) memory product release is presented. Specific development stages include parallel capacitor array evaluation, capacitor characterization array development, memory macro creation and measurement, and initial product design and qualification. Representative data, learning goals, and critical outputs will be presented for each development phase. We note that the cost and complexity of the development effort increase dramatically as the new technology approaches high-volume manufacturing. We hope that the documentation of our experiences in this manuscript may be of assistance to those teams striving to create the next generations of non-volatile embedded memory technology.
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