CdCl2-Enabled Hysteresis Suppression in Vapor-Deposited Tin Perovskite Transistors

Abstract Tin halide perovskites are promising lead-alternative semiconductors that have demonstrated remarkable advances as channel materials for p-type thin-film transistors (TFTs). However, their practical use in TFTs remains limited by severe self p-doping and pronounced hysteresis. Here, we introduce CdCl2 into vapor-deposited CsSnI3 to obtain p-type TFTs with strongly suppressed hysteresis and an on/off current ratio of ∼106. The partial passivation of iodide vacancies by Cl– induced a reduction of ion migration, thereby mitigating hysteresis. In addition, the incorporation of CdCl2 lowered the thermal activation barrier for complete perovskite phase formation and enhanced the structural resilience of the film. These results establish additive engineering as an effective route to regulate vacancy chemistry, suppress ion migration, and lower the thermal budget of vapor-deposited tin halide perovskite formation, offering a practical design strategy for stable and manufacturing-compatible perovskite electronics.