Comparative Performance Analysis of 6T SRAM Using MOSFET and FINFET Technologies
作者
Medapati Prema Kumar,Kalluru Padma Vasavi,Appikatla Blessy Susanna
标识
DOI:10.1109/iceteg66194.2025.11472931
摘要
SRAM (Static Random-Access Memory) is widely used in high-speed cache memory, registers, and processors due to its fast access time and low latency. It is essential for applications requiring quick data retrieval, such as microprocessors and embedded systems. This paper presents a comparison of conventional Static Random-Access Memory at 180 nm and 45 nm technologies and explores the advantages of FINFET-based SRAM using the Cadence tool. The study evaluates key performance metrics, including power consumption, delay, and stability, to highlight the impact of scaling and advanced transistor architectures. The results show that while traditional bulk CMOS faces increased leakage and power dissipation at smaller technology nodes, FINFET-based SRAM achieves 8.8% lower power,$\boldsymbol{\sim} \mathbf{9 8. 7 \%}$reduction in delay, and over 90% smaller area compared to 180 nm technology, and outperforms 45 nm CMOS with 2.5% lower power, ˜98.7% faster operation, and$\sim 72 \%$smaller area. These findings indicate that FINFET technology offers a highly efficient solution for future low-power and high-performance SRAM designs.