A D-Band Variable Gain Low Noise Amplifier in a 28-nm CMOS Process for 6G Wireless Communications

This paper presents a D-band variable gain low noise amplifier (VGLNA) in a 28 nm CMOS process for 6G wireless communications. The VGLNA consists of four differential common-source (CS) stages with a capacitive neutralization technique and a passive bridged T-type attenuator stage. The VGLNA provides a high-gain mode, a mid-gain mode, and a lowgain mode to support a wide dynamic range of the receiver. The gain control range is 22.0 dB from 3.4 dB to 25.4 dB at the center frequency. In a high-gain mode, the VGLNA shows a measured gain of 25.4 dB with a 3-dB bandwidth of 15 GHz. The technique of a double-gate transistor is adopted, and the size of the 1st CS stage is chosen after careful consideration of a matching loss of the input balun to improve the noise figure (NF). In addition, the loss of the input balun is minimized using a custom capacitor for the overall NF of the VGLNA. The measured minimum NF is 4.5 dB at 141 GHz. The input P1dB (IP1dB) and the input third order intercept point (IIP3) at 142 GHz are -23.9 dBm and -16.1 dBm, respectively. The VGLNA consumes 34 mA with a 0.9 V supply voltage. It occupies an area of 775 × 420 μm2.