田口方法
焊接
可靠性(半导体)
材料科学
温度循环
有限元法
接头(建筑物)
倒装芯片
结构工程
热的
复合材料
电子包装
印刷电路板
机械工程
粘弹性
通过硅通孔
压力(语言学)
还原(数学)
响应面法
集成电路封装
热分析
回流焊
表面贴装技术
正交数组
电子元件
材料性能
蠕动
电路可靠性
作者
Xuexia Yang,Miao Zhu,Jinming Li,Yanxi Sun,Chao Chang,Hao Xin
出处
期刊:Soldering & Surface Mount Technology
[Emerald Publishing Limited]
日期:2025-09-02
卷期号:38 (1): 50-60
标识
DOI:10.1108/ssmt-04-2025-0020
摘要
Purpose This study aims to enhance the thermal cycle reliability of hollow through-silicon via (TSV) structures in three-dimensional (3D) electronic packaging by optimising structural parameters to minimise the equivalent plastic strain in critical solder joints, thereby extending their fatigue life under thermal cycling conditions. Design/methodology/approach A 3D finite element model of the TSV package was developed to analyse stress−strain behaviour under thermal cycling. Two optimisation methodologies − Taguchi orthogonal method and response surface method − were used to identify optimal parameter combinations. Key variables included hollow structure material, dimensions (height and diameter) and solder joint geometry. The Anand viscoelastic model was applied for solder joints, and fatigue life prediction was conducted using the Engelmaier model. Findings The optimised parameters derived from the Taguchi method (tungsten material, hollow height: 75 µm, diameter: 44 µm; solder joint diameter: 68 µm, height: 22 µm) reduced the equivalent plastic strain by 11.94%. Further refinement via the response surface method achieved a 17.49% reduction (hollow height: 75.801 µm, diameter: 42.761 µm; solder joint diameter: 67.944 µm, height: 21.981 µm). Fatigue life prediction indicated a 1.26-fold lifespan improvement post-optimisation, demonstrating significant reliability enhancement. Originality/value This research innovatively combines Taguchi and response surface methods for multi-stage optimisation of TSV structures; the optimal combination of TSV structural parameters is constructed. It fills a gap in thermal performance parameter optimisation for TSV hollow structures and provides a scientific foundation for improving reliability in 3D electronic packaging, offering practical engineering significance for high-density integrated circuit design.
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