Packaging Architectures for Silicon Carbide Power Electronic Modules

High-density power electronic systems require the integration of multiple power semiconductor devices into single power electronic modules. One of the major advances to power electronic system integration has been the commercial availability of silicon carbide (SiC) power semiconductor devices. Increased switching speeds, lower on-state resistance, higher breakdown voltage, and higher operating temperatures of these SiC power devices lead to higher performance and greater miniaturization when compared to those of silicon power devices. At present, these SiC devices are limited by their current handling capability. As such, paralleling of multiple SiC devices is commonly used to increase current handling capability in SiC power electronic modules. This paper describes techniques to address performance limitations while achieving the potential merits of wide bandgap device technology. A great deal of this activity involves wire bondless packaging techniques to achieve lower inductances and higher packaging density.