材料科学
电容器
退火(玻璃)
光电子学
场效应晶体管
金属
半导体
电介质
氧化物
碳化硅
表征(材料科学)
可靠性(半导体)
晶体管
栅氧化层
栅极电介质
电气工程
纳米技术
复合材料
冶金
电压
工程类
功率(物理)
物理
量子力学
作者
Zhihua Dong,Leifeng Jiang,Manqi Su,Zeng Chen,Hui Liu,Botong Li,Sun Yu-rong,Qi Cui,Zhongming Zeng,Baoshun Zhang
出处
期刊:Electronics
[MDPI AG]
日期:2024-01-31
卷期号:13 (3): 596-596
标识
DOI:10.3390/electronics13030596
摘要
We performed dry oxidation on n-type silicon carbide (SiC), followed by annealing in diluted N2O, and subsequently fabricated n-type MOS structures. The study aimed to investigate the impact of different annealing times on the trap charges near the SiC/SiO2 interface and the reliability of the gate dielectric. Capacitance-voltage (C-V) and current-voltage (I-V) measurements of the n-type MOS revealed that increasing the annealing time with N2O effectively reduces the density of electron traps near the SiC/SiO2 interface, mitigates the drift in flat-band voltage and enhances the oxide breakdown field strength. However, excessive annealing time leads to an increase in the flat-band voltage drift of the MOS, resulting in premature oxide breakdown. Using the optimized annealing conditions, we fabricated n-type LDMOSFETs and obtained the threshold voltage (Vth), field-effect mobility (μFE) and specific on-resistance (Ron-sp) from the transfer curve (Id-Vg) and output curve (Id-Vd) measurements. The research findings provide valuable insights for the gate oxidation process of SiC.
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