Shmoo plotting: the black art of IC testing

Modern IC testing has developed many different techniques each with specific targets for improving quality and controlling the process to improve the yield over the life time of the product. Shmoo plotting of digital ICs is part of the early product characterisation procedures intended to establish that the design is stable within the process and can be manufactured with virtually zero yield loss, except for spot defects. In this sense Shmoo plotting verifies that the IC has been implemented to six-sigma design principles, or better. It also allows the wafer/batch monitoring parameters to be accurately established for the product. For the vast majority of ICs for which no performance binning is performed it avoids testing all of the parts in production for process variations. This is economically essential for high volume production because testing a device for process variations expressly implies functional testing, instead of simple defect oriented testing such a scan testing or IDDQ. Thus, knowledge gained from Shmoo plotting can be used to optimize the process, design and final test program.