34‐3: Invited Paper: Wafer‐Scale Hybrid 3D Integration of Micro‐LEDs and IGZO TFTs via Simultaneous Substrate Removal and Bonding

We propose a wafer‐scale Hybrid 3D Integration to overcome conventional pick‐and‐place bottlenecks. The process enables simultaneous Si substrate removal and flip‐chip bonding, utilizing optimized TMAH etching and Ag‐In bonding. We verified the key process, including high‐performance IGZO TFTs and Micro‐LEDs. Establishing geometric design rules ensures high‐yield release, offering a viable pathway for high‐resolution displays.