Closed-Form Expressions for the Resistance and the Inductance of Different Profiles of Through-Silicon Vias
作者
Yuanjun Liang,Ye Li
出处
期刊:IEEE Electron Device Letters [Institute of Electrical and Electronics Engineers] 日期:2011-02-03卷期号:32 (3): 393-395被引量:70
标识
DOI:10.1109/led.2010.2099203
摘要
In this letter, closed-form expressions are proposed to calculate the parasitic resistance and inductance of different profiles of through-silicon vias (TSVs). The formulas for the tapered TSV are developed as the functions of the geometric parameters of the via. The expressions also cover the straight TSV when the slope wall angle is zero. The comparison between the formulas and numerical electromagnetic results shows that the formulas have high accuracy at low frequency, with maximum errors of 2% and 5% for the resistance and the inductance, respectively. The errors increase at high frequencies due to the skin effect and can be minimized by using fitting parameters.