ALD W Metal Gate CMP

Beyond 32nm node, gate last integration scheme had become a mainstream because it ensures the thermal stability of high- k and metal gate stack by applying the metal gate after the high temperature source/drain activation anneal. During HKMG gate last CMOS integration, metal gate chemical and mechanical planarization (CMP) is an indispensable and key process step. Al metal gate is firstly introduced from 32nm node by Intel, which brought new process challenges for Al filling and correspondent CMP. We adopted W as metal gate using atomic layer deposition (ALD) method, besides of ALD W ideal fill capability, compatibility with traditional W CMP is also taken into account. Different ALD W layers were prepared using B 2 H 6 base and SiH 4 base. Removal rate, surface roughness and electrochemical characteristic in W slurry were examined for two types ALD W. The removal rate of B 2 H 6 base ALD W was high than that of SiH 4 base. RMS of ALD W with SiH 4 and B 2 H 6 base were all less than 1nm after CMP. The adhesion of SiH 4 base ALD W between W and barrier layer was stronger than that of B 2 H 6 base ALD W. B 2 H 6 base ALD W has better filling ability than that of SiH 4 base ALD W for small size gate trench. Compared with single base ALD W filling metal gate, B 2 H 6 base ALD W filling with SiH 4 base ALD W pre-treatment was more benefit to decrease metal gate dishing after CMP process.