The gate length effect of high-performance monolayer SiAs 2 FETs

Abstract The monolayer SiAs 2 field-effect transistors (FETs) with gate length ( L gate ) ranging from 1 to 50 nm were investigated by Silvaco-Atlas simulation in which the main parameters of monolayer SiAs 2 were obtained by first-principles calculations. Both the p- and n-FET show extremely high on/off current ratio (10 14 ) and low leakage current (10 −18 A μ m −1 ), which are independent of gate length within the 15–50 nm range. And monolayer SiAs 2 FETs show practically acceptable values of subthreshold slope and drain-induced barrier lowering when L gate ⩾ 30 nm. On the other hand, the p-and n-FETs show highest transconductance ( g m ) when L gate is between 25 and 35 nm. Our results suggest that the high performance 35 nm gate length monolayer SiAs 2 FETs hold great potential for applications in low-dimensional electronic devices.