宽带
无杂散动态范围
电子工程
线性
CMOS芯片
电容器
级联
NMOS逻辑
运算放大器
缓冲放大器
比较器
放大器
计算机科学
缓冲器(光纤)
工程类
电气工程
晶体管
电压
化学工程
作者
Dengquan Li,Feng Tian,Jiale Ding,Yi Shen,Shubin Liu,Zhangming Zhu
标识
DOI:10.1109/tvlsi.2024.3349564
摘要
A highly linear input buffer is crucial for high-speed and high-resolution analog-to-digital converters (ADCs) since it isolates the kickback noise and package inductance. Several important factors affecting the linearity of the input buffer are analyzed in this brief, and a wideband input buffer with high linearity based on cascade complementary source follower (CCSF) is proposed. This cascaded input buffer is composed of a pMOS source follower (PSF) and an nMOS source follower (NSF). Compensation capacitor, assisted operational amplifier (opamp), bootstrapped-capacitor level-shifting circuit, current amplifier, and optimization strategies are utilized to extend the bandwidth and reduce distortion. Designed in a 65-nm CMOS, the CCSF input buffer achieves the spurious-free dynamic range (SFDR) and a signal-to-noise and distortion ratio (SNDR) of 76.6 and 58.1 dB with 1.9-GHz input frequency, respectively. It occupies 0.0155 mm $^2$ and consumes 27 mW at 2.5 V.
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