Digital Compensated Methodology of a 2-1-1 cascaded continuous time delta-sigma modulator
作者
Po-Sheng Chen,Hsin‐Liang Chen,Jen‐Shiun Chiang
出处
期刊:日期:2009-05-01卷期号:3: 2245-2248被引量:1
标识
DOI:10.1109/iscas.2009.5118245
摘要
Conventionally a continuous time (CT) cascaded delta-sigma modulator is designed by virtue of the transforming from its equivalent discrete time (DT) cascaded delta-sigma modulator with compensation paths in the analog part. This work presents a new approach that does not need analog compensation paths when implementing a high order cascaded CT delta-sigma modulator. We move the compensation paths to the digital cancellation filters, and it leads to a more efficient architecture in terms of circuitry complexity, power consumption, area cost, and the robustness of circuit non-ideality. A 2-1-1 CT cascaded delta-sigma modulator for audio band application was designed and simulated; the dynamic range is 83.7 dB. The simulation results indicate that the performance of this delta-sigma modulator is competitive to the conventional approach with less hardware complexity and power dissipation.