Design of Protocol-Based Finite-Time Memory Fault Detection Scheme With Circuit System Application

The protocol-based memory fault detection (FD) problem under finite-time constraint is investigated for nonlinear networked systems, where the round-robin protocol is adopted to identify which sensor node can release the measured value at each transmission instant. In particular, the past states of the filter are exploited to develop the memory fault detection filter (FDF). Subsequently, the Finsler lemma and the Lyapunov approach are combined to analyze the finite-time stability of the addressed system. Then, the specific expression of the memory FDF gain matrices is obtained by using the solutions to certain matrix inequalities. In addition, for the aim of verifying that the memory FD approach has higher detection accuracy, a memoryless FDF is also designed in comparison with the memory FDF. In the end, the illustrative simulation studies are given to demonstrate the applicability of developed FD filtering algorithms in resistance–inductance–capacitance circuit system and the superiority of the designed memory FD scheme.