光电二极管
光电子学
图像传感器
材料科学
物理
拓扑(电路)
电气工程
光学
工程类
作者
Chih-Chao Yang,Kuan‐Chang Chiu,Cheng-Tse Chou,Chang-Ning Liao,Meng‐Hsi Chuang,Tung-Ying Hsieh,Wen-Hsien Huang,Chang‐Hong Shen,Jia‐Min Shieh,Wen‐Kuan Yeh,Yu‐Hsiu Chen,Meng‐Chyi Wu,Yi‐Hsien Lee
标识
DOI:10.1109/vlsit.2016.7573448
摘要
A monolithic 3D image sensor is demonstrated by sequentially fabricating large-area (>2cm×2cm) monolayer (<;1nm) transition metal dichalcogenide (TMD) phototransistor array on top of a 3D logic/memory hybrid 3D + IC connected by high density interconnect. The photocurrent of the monolayer MoS 2 phototransistor shows a linear response to the incident laser power density and exhibits high responsivity (>20A/W). The bottom 3D stackable poly-Si nanowire FET, fabricated by low thermal budget process (T sub <;400°C), represents steep subthreshold swing (<;120mV/dec.) and high driving current (>200uA/um). The low driving voltage 6T SRAM shows a static noise margin (SNM) of 150 mV at V DD =0.5V. Such integration of large-area monolayer TMD phototransistor array on logic/memory hybrid 3D + IC enables the low power and low cost monolithic 3D image sensor.
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