A 7T2C Pixel Circuit with Dual Data Channel and V th Compensation for OLEDoS

This paper presents a novel pixel circuit architecture for high-resolution silicon-based microdisplays with enhanced color depth. The proposed circuit employs a dual data voltage scheme and consists of seven field-effect transistors (FETs) and two capacitors (7T2C). A voltage programming technique is utilized to generate the requisite driving voltage from the two data voltages, enabling the driving transistor to produce the pixel currents. To address the challenges posed by threshold voltage ($V_{\text {th }}$) variations in the driving transistor, a compensation scheme is introduced, effectively mitigating their impact and enhancing display uniformity. Simulation results, based on a 55 nm CMOS process, demonstrate that the proposed pixel circuit achieves a 9-bit gray level resolution with dual data inputs. The compensated pixel current errors are observed to range from $-9.62 \%$ to $+8.83 \%$ under the FF Corner and SS Corner conditions. Furthermore, Monte Carlo simulations reveal a maximum pixel current variation of $6.03 \%$, indicating the circuit’s robust performance and practical viability.