Thermal resistance prediction model for IC packaging optimization and design cycle reduction

还原(数学) 热阻 材料科学 集成电路封装 热的 计算机科学 光电子学 集成电路 热力学 数学 物理 几何学
作者
Guan‐Wei Chen,Yan‐Cheng Lin,Chung-Hsiang Hsu,Tang-Yuan Chen,Chen-Chao Wang,Chin-Pin Hung,Hung-Kai Wang
标识
DOI:10.1109/ectc51529.2024.00260
摘要

The development of highly reliable packaging products is paramount, as accurately predicting the thermal resistance values (Theta JA, JB, JC) of IC packages is crucial for calculating maximum power dissipation and mitigating self-heating effects. In this paper, we focus on the prediction and analysis of thermal resistance in packaged products. Traditionally, finite element methods (FEM) are used for simulations to predict thermal resistance. However, these simulations often employ idealized assumptions that may not align with real-world conditions. Furthermore, traditional simulation methods require substantial memory space and high-performance hardware, leading to significantly increased computation times as the complexity of the simulation increases, thereby extending the product verification timeline. Machine learning methods can effectively improve operational speed and reduce costs. This research utilizes datasets generated from past FEM simulations, testing various machine learning models, among which the Artificial Neural Network (ANN) models, a deep learning approach, yielded the best results. These models were then primarily employed for predicting the characteristics of packaged components. The findings indicate that the predicted results closely align with the FEM simulation data, with the percentage error in thermal resistance for QFN packages being less than 5%, thereby achieving structural optimization of packaged products and shortening the design cycle. Additionally, a user interface platform was developed to enhance research efficiency significantly. Researchers simply need to select the desired packaging technology product and enter the structural parameters to generate predictive results and visual charts, making it accessible even for operators lacking programming skills. Ultimately, the goal is to achieve visual structural optimization and shorten the design cycle for IC packaged products, serving as a basis for future structural studies of products.

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