Holistic Chiplet Packaging Approach

The economic advantages of silicon scaling according to Moore’s Law have gone, as today, only a limited number of foundries can afford the manufacturing of high-end nodes. Now, heterogeneous integration in combination with advanced packaging are the path to achieve economic advantages and also to enable new applications. Many options for the package including silicon interposers, Fan-out on substrate, bridge solutions and variations of 3D stacking approaches are seen as possible solutions. However, performance of current applications requires still more transistors per system, but industry also needs a new, more economical system packaging approach. Chiplets are considered the main solution to address this challenge.Besides all the design aspects, packaging of Chiplet-based systems also holds quite some challenges and requires advanced packaging approaches. The presentation will summarize different advanced packaging solutions as Flip Chip on organic, silicon or fan-out interposer and discuss key challenges as e.g., warpage and possible mitigation solutions. In summary the entire packaging approach from chip to system board has to be considered.