In this paper, we propose a hardware architecture based on MSFLA algorithm for MRI recognition. MSFLA is the newly developed metaheuristic proposed by Ladgham et al (Ladgham, Hamdaoui, Sakly and Mtibaa, 2013). The hardware architecture is developed using the high-level design tool Xilinx System Generator (XSG) and it is implemented on Virtex-V Field Programmable Gate Array (FPGA). The implementation of our technique on FPGA gives it the advantages of portability and real time recognition. The performances of the proposed method are validated and demonstrated using a set of medical images.