Enhancing device performance through shape design in channel-less SOT-MRAM

Abstract We present an experimental study on magnetic tunnel junctions (MTJs) patterned into elliptical shape and integrated within a channel-less (CHL) spin-orbit-torque magnetic random access memory (SOT-MRAM) device architecture. The CHL architecture eliminates the need to stop etching at the SOT track layer, simplifying fabrication and enabling reliable large-scale manufacturing on 300 mm wafers with yield above 99.6%. The elliptical MTJ geometry enables a significant reduction in critical switching current, achieving reliable operation with a switching current of 460 μ A under a 5 ns pulse. The devices exhibit a tunneling magnetoresistance ratio of up to 129.3%, a thermal stability factors (Δ) of 59.3 at room temperature, and robust endurance over 10 12 write cycles. These results confirm that combining elliptical MTJ designs with the CHL framework not only enables reliable, high-yield fabrication but also enhances the performance and energy efficiency of SOT-MRAM devices, offering a promising path toward scalable, low-power spintronic memory technologies.