可靠性(半导体)
缩放比例
计算机科学
可靠性工程
抽象
堆积
超大规模集成
设计流量
过程(计算)
范式转换
电子设备和系统的热管理
电子工程
功率(物理)
工程类
嵌入式系统
机械工程
几何学
哲学
物理
操作系统
认识论
数学
量子力学
核磁共振
作者
Divya Prasad,Girish Kini,Sriram Chandrasekaran,Sudhanva Gurumurthi,Amy Novak,Tom Burd
标识
DOI:10.1109/iedm45741.2023.10413760
摘要
Semiconductor manufacturing inventions like gate-all-around devices, back-side power, and 2.5D and 3D stacking at the packaging level have driven continued technology scaling despite the slowdown in critical dimension process scaling. While these inventions show promise for enhancing performance, they have elevated the need for thermal and reliability management to be classified as first-class design challenges across abstraction levels. In this paper, we will discuss the scaling implications, highlight the increasing trend in thermal and reliability challenges, and bring out the need to enhance existing VLSI design flow and modeling with more tightly coupled, spatially accurate, precise thermal and IR modeling.
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