与非门
计算机科学
直线(几何图形)
电子工程
计算机存储器
半导体存储器
组分(热力学)
感测放大器
非易失性存储器
计算机数据存储
存储单元
残余物
计算机硬件
动态随机存取存储器
词(群论)
数据保留
逻辑门
内存刷新
遮罩(插图)
位(键)
嵌入式系统
常规存储器
可靠性(半导体)
内存体系结构
内存管理
作者
Xiaochen Zhu,Mina Rashetnia,Elliott Rill,Lito De La Rama
出处
期刊:Proceedings
日期:2025-11-07
卷期号:85212: 111-114
标识
DOI:10.31399/asm.cp.istfa2025p0111
摘要
Abstract 3D NAND memory, featuring vertically stacked memory cells to enhance storage density and performance, serves as a critical component in modern data storage solutions and AI applications. In this paper, we investigated the electrical impact of memory hole (MH) mis-formation defects in a multi-tier three dimensional (3D) NAND memory technology. Despite being confined to local word lines (WLs) and source lines (SLs), such defects cause a global impact to all the memory cells in the same plane by slowing down their program speed. Specifically, the bit line potential of victim cells is disturbed when quick pass write (QPW) program technique is implemented. Such disturb originates from the interaction between source line and global bit line through the aggressor memory cells. Based on the failure mechanism, several approaches were proposed to improve the screen efficiency for these defects, which could otherwise become latent system failures.
科研通智能强力驱动
Strongly Powered by AbleSci AI