High-k field plate DeNMOS design for enhanced performance and electrothermal SOA in switching applications

This paper investigates high-k dielectric field plate (FP) application to optimize the capacitance and avalanche behavior of conventional drain extended NMOS (C_DeNMOS) for enhanced performance and electrothermal safe operating area (SOA) in transient switching applications. Two configurations of high-k dielectric DeNMOS have been investigated: 1) Planar and 2) Trench. Doping of FP is changed from N+ to P+ in Planar, while shallow trench isolation (STI) is placed below the N+ doped FP in the Trench structure to limit surface charge accumulation in comparison to C_DeNMOS. We demonstrate that efficient reduced-surface-field (RESURF) action of high-k dielectric improves the shielding against high lateral fields, enhancing electrical and electrothermal SOA. Furthermore, for electrothermal SOA analysis, unclamped inductive switching (UIS) simulations have been performed, and it is shown that high parasitic BJT trigger voltage (Vt1) and second breakdown current (It2) enable safe turn-off of the device under high current transient conditions.