Ultrathin insulators as gate dielectric for blue phosphorene field-effect transistors

磷烯 材料科学 电介质 光电子学 栅极电介质 场效应晶体管 晶体管 工程物理 凝聚态物理 电气工程 带隙 物理 电压 工程类
作者
Xian Lin,Jian‐Min Zhang,Guigui Xu,Kehua Zhong,Zhigao Huang
出处
期刊:AIP Advances [American Institute of Physics]
卷期号:15 (3) 被引量:1
标识
DOI:10.1063/5.0247918
摘要

Two-dimensional (2D) semiconductors have been explored as potential channel materials in future nanoscale field-effect transistors (FETs). However, searching for suitable gate dielectric materials interfaced with 2D semiconductor channels and controlling their quality to guarantee efficient gate role are critical and challenging in the fabrication of high-performance nanoscale FETs. In the present article, we adopt first-principles calculations to explore the binding energies, band structures, and electronic properties of heterojunctions between monolayer blue phosphorene (BlueP) semiconductor and dielectrics, including BlueP-BN, BlueP-HfO2, BlueP-TiO2, and BlueP-CaF2. For the first time, we deeply investigate the electronic properties of BlueP-dielectric heterojunctions under perpendicular external electric fields. Our calculated results indicate that HfO2 thin layer and monolayer CaF2 dielectrics are appropriate as gate dielectrics for BlueP-based FETs, and furthermore, monolayer CaF2 is superior to HfO2. We also investigate the electronic properties of BlueP-HfO2 with interfacial O-vacancy and BlueP-CaF2 with interfacial F-vacancy, as well as hydrogen passivation to the F-vacancy of BlueP-CaF2. Our results indicate that the interfacial atomic vacancies of dielectric layer greatly deteriorate its dielectric properties and have great impacts on the electrical properties of the whole heterojunction. Fortunately, hydrogen passivation to F-vacancy of BlueP-CaF2 can effectively protect the semiconductor properties of BlueP and the dielectric properties of CaF2. This implies that hydrogen passivation strategy can improve the performance of 2D semiconductor-based nanoelectronic devices with CaF2 as a gate dielectric, thus providing guidance for the design and optimization of future nanoscale FETs.
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