Si interposer build-up options and impact on 3D system cost

The requirements for embedded system functionalities promote stacked integration solutions where interposers are used as large carriers to provide dense interconnections among functional dies. Using the cost model developed at imec, the processing cost of different interposer features is analyzed. Build-up options of various interposer configurations are compared and the additional cost of the interposer component is highlighted. In addition the impact of interposer testing on the system cost is investigated for different interposer substrate areas.