MOSFET
光电子学
绝缘体上的硅
薄脆饼
材料科学
晶体管
电气工程
CMOS芯片
短通道效应
阈值电压
电子工程
电压
工程类
硅
出处
期刊:Elsevier eBooks
[Elsevier]
日期:2021-01-01
卷期号:: 141-177
标识
DOI:10.1016/b978-0-12-819643-4.00010-0
摘要
Any piece of SOI is actually an upside-down MOS capacitor. The Si substrate acts as a gate, the BOX is the gate dielectric, and the semiconductor film is the body. To convert this capacitor into a transistor, two probes are applied on the sample surface and renamed source and drain. According to the gate voltage polarity, an electron channel or a hole channel is induced at the film–BOX interface. Since the current–voltage characteristics are strikingly similar to those of a fully processed N-channel or P-channel MOSFET, the device was called pseudo-MOSFET or Ψ-MOSFET. During the years, it became the indisputable method, adopted by all SOI manufacturers, for screening the electrical properties of virgin SOI wafers in terms of electron and hole mobility, oxide charges, and interface traps. The outstanding merits of the Ψ-MOSFET are simplicity, accuracy, and speed. Comparatively, the metrology of SOI wafers based on the characterization of fully integrated CMOS devices is a long and costly process that is also susceptible to alter the properties of the starting wafer.
科研通智能强力驱动
Strongly Powered by AbleSci AI