Reconfigurable Ferroelectric Junction Field‐Effect Transistor for Input Masking Preprocessing in Efficient Neural Networks

ABSTRACT Edge computing face significant challenges due to continuous data explosion. Executing masking preprocessing directly at the input terminal to shield interference data serves as an effective mitigation strategy. However, integrating this input masking operation with controllable synaptic functions into the same unit faces inherent challenges regarding device reconfigurability and functional versatility. Here, we report a reconfigurable In 2 Se 3 /MoTe 2 ferroelectric junction field‐effect transistor (FeJFET) that enables input masking preprocessing (IMP) for efficient neural networks. The device leverages its semiconducting properties to achieve non‐hysteretic logic operations, while utilizing ferroelectric polarization switching to establish synaptic plasticity. Consequently, the FeJFET realizes IMP with reconfigurable criterion, and functions as a controllable hetero‐synapse through precise modulation of the polarization degree and the PN junction depletion region. Exploiting the multifunctionality, we construct a dual‐FeJFET unit that executes IMP to selectively mask redundant inputs. Validated in an industrial defect detection scenario, a spiking neural network (SNN) incorporating these IMP units achieves 94.9% classification accuracy while halving the computational overhead. This work provides a promising solution for IMP in energy‐efficient neural networks.