Improvement of Disturb and Endurance in NOR Flash Memory

The optimization methods of embedded NOR flash memory disturb and endurance characteristics are discussed in this paper. By optimizing the germanium implant (Ge IMP) process, the dislocations under flash cell can be reduced to improve the flash memory disturb. Additionally, the flash memory endurance is enhanced by optimizations of world Line (WL) erase efficiency and control gate (CG) and floating gate (FG) coupling efficiency, which can expand the window of read currents.